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Whither GPGPU?

During the last panel session of ISC, I was surprised to hear a unanimous opinion from the participants —  two users and two vendors (Michael Resch from HLRS, Satoshi Matsuoka from the University of Tokyo, Jean-Marc Denis from Bull, Andrew Jones from NAG): They all agreed that GPUs will likely not survive as an HPC compute engine in the long term. I hasten to add, however, that they all did feel that the kind of massive SIMD parallelism offered by GPGPU would continue — but as part of a more tightly-coupled, heterogeneous architecture. None of them said it explicitly, but the obvious elephant in the room was the Intel MIC (Many Integrated Core) Architecture, which was initially announced at ISC ’10 and visible in several booths on the floor of ISC ’11 in Hamburg. The MIC approach moves the SIMD units from the GPU (a PCI device) onto the main socket with the system’s CPU cores. This is analagous to the earlier migration of floating point from co-processors into the system’s main CPU.

I share the opinion expressed by the panel and, in fact, made the same observation at SC ’10 in New Orleans when nVidia announced they would be embedding an ARM processor with their SIMD units. My immediate thought was that this was “game over” for nVidia (for GPGPU) because they had essentially validated Intel’s approach by indicating that tight integration between the CPU and SIMD units is correct future approach. And with volume economics on Intel’s side, I’m pretty sure who I’d pick to win this one. But who knows — this industry is always full of surprises.

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